Xiaoqin Wang

Xiaoqin Wang was born in Chongqing in 1995. She received her M.S. degree in electrical engineering from Chongqing University (CQU) in 2021. After completing her studies, she joined the research group CAS (Dept. ELIS, Ghent University) as a PhD researcher in Analog Circuit and System Design for Powerline Signal Integrity.

Teaching

Research

contact
Xiaoqin Wang
Ghent University
Department of Electronics and Information Systems (ELIS)
iGent - Technologiepark Zwijnaarde 126
9052 Zwijnaarde Belgium
Phone: +32 9 264 33 96